AMD is reportedly sharing its latest Ryzen desktop processor, powered by the new “Zen 6” microarchitecture and codenamed “Medusa Ridge,” with close partners like platform designers and OEMs, according to Yuri Bubliy (aka 1usmus), the creator of Hydra tuning software and the retired DRAM Calculator for Ryzen. This processor brings updates to both the core complex dies (CCDs) and the client I/O die (cIOD), marking some exciting changes. AMD has confirmed that the “Zen 6” CCD is being built on TSMC’s advanced 2 nm node, which started risk production earlier this year and should be ready for full production of 2 nm chips later in 2025. This is a big leap from the current TSMC N4P node used for the 8-core “Zen 5” CCD, and it’s expected to let AMD pack more cores into each CCD.
There’s buzz that AMD might bump up the core count per CCD to 12, paired with a 48 MB L3 cache. It’s unclear yet whether all 12 cores will share one big 48 MB L3 cache in a single core complex (CCX) or if they’ll split into two 6-core CCXs, each with 24 MB of L3 cache. Another highlight is the updated client I/O die. AMD is likely to use a newer EUV node, like 5 nm N5 or 4 nm N4P, stepping up from the current 6 nm N6. According to 1usmus, the main reason for this upgrade is to revamp the memory controller. The “Medusa Ridge” is set to feature a new dual memory controller design, keeping the two DDR5 channels per socket but tweaking them for faster memory speeds to help AMD compete with Intel. As for boosting tech like PBO and Curve Optimizer, no changes are expected, and 1usmus thinks Hydra support will be a smooth process.
What do you think about these new Ryzen upgrades? I’d love to hear your thoughts!
Source: Wccftech
